This invention relates to the fabrication of integrated circuits, and more particularly, to a manufacturing apparatus and a method that planarizes wafer surfaces.
The fabrication of integrated circuits involves a sequence of steps. The process can involve the deposition of thin films, the patterning of features, the etching of layers, and the polishing of surfaces to planarize or remove contaminants.
Chemical Mechanical Polishing (xe2x80x9cCMPxe2x80x9d) is one process that planarizes surfaces and removes contaminants. A CMP process involves subjecting a semiconductor wafer to a rotating pad and a chemical slurry. The polishing process is a grinding of the wafer surface and a chemical reaction between the surface and the chemical slurry.
Planarizing and cleaning wafer surfaces by a CMP process can be very effective but also can be difficult to control. Removal rates by a CMP process can change with the rotation rates of the pad and the wafer, by the pH or flow rates of the chemical slurry, or by the distribution of the chemical slurry near the center of the wafer, for example. Even variations in feature densities or pressure variations across the polishing pad can cause variations in the removal rates of wafer layers and contaminants.
Controlling the removal rates can be a very difficult process given that many other parameters can also cause variations. Accordingly, there is a need to control the removal rates across an entire or a selected portion of a wafer surface.